1. Field of the Invention
The present invention relates to a voltage level shift circuit and a semiconductor integrated circuit including a differential amplifier circuit which uses the voltage level shift circuit. More particularly, the present invention relates to a voltage level shift circuit with improved relative accuracy and improved power supply rejection ratio and to a semiconductor integrated circuit using the voltage level shift circuit.
2. Description of the Related Art
A technique to add a voltage level shift circuit to an input stage of a differential amplifier circuit or the like to expand an input voltage range of the differential amplifier circuit is conventionally widely used (see, for example, JP 05-22054 A).
Such a voltage level shift circuit is, for example, in a constant voltage circuit illustrated in FIG. 6A, inserted on an input side of an error amplifier (differential amplifier circuit) 101 to be used as a voltage level shift circuit 100 for expanding an input voltage range of the error amplifier (differential amplifier circuit) 101 in some cases. In such a constant voltage circuit, when a low voltage (for example, 315 mV) is outputted as an output DCout, in order to decrease the number of divided resistors R1 and R2 connected to a power MOS transistor 31 for power output, it is preferable to monitor as a low voltage as possible by a voltage feedback signal VFB and to set a reference voltage Vref outputted from a reference voltage circuit 30 to 315 mV.
However, as the error amplifier 101, a differential amplifier circuit using MOS transistors as illustrated in FIG. 6B is often used. In the differential amplifier circuit (error amplifier) 101, a drain-source voltage (Vds) of an N-channel enhancement type MOS transistor M11 is about 200 mV, while a gate-source voltage (Ggs) of an N-channel enhancement type MOS transistor M9 is about 400 mV, and thus, an input signal of 600 mV or more is necessary at input terminals IN+ and IN− of the differential amplifier circuit. Therefore, it is necessary to shift the level of the direct current potential of a reference voltage Vref (signal of about 315 mV) and a voltage feedback signal VFB by the voltage level shift circuit 100 to be inputted to the differential amplifier circuit (error amplifier) 101 as a signal of 600 mV or more.
In this way, when the level of the direct current potential of an input signal is shifted in a positive direction by a voltage level shift circuit, a source follower circuit using a P-channel enhancement type MOS transistor with a constant current circuit being a load is sometimes used. For example, FIG. 7 illustrates an exemplary conventional source follower circuit (see Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Maruzen Co., Ltd., Mar. 30, 2003, pp. 82-91).
The conventional source follower circuit uses a constant current source formed of a bias voltage source 14 for outputting a constant voltage with a power supply voltage being the reference and a P-channel enhancement type MOS transistor M32 as a load of a P-channel enhancement type transistor M31. Here, the relationship between a direct current potential Vi of the input voltage and a direct current potential Vo of the output voltage is:Vo=Vi+VTP+(1/K)1/2,  (1)where a current supplied by the constant current source is I. Here, VTP and K are a threshold voltage and a conductance coefficient, respectively, of the P-channel enhancement type transistor M31 which operates as a source follower.
It is to be noted that there are conventional reference voltage circuits and an electronic device (see JP 2003-295957 A). However, an object of the conventional reference voltage circuits is to decrease the difference in voltage applied to the reference voltage circuits and to make smaller the difference between the output voltages of the respective reference voltage circuits. The conventional reference voltage circuits are not related to the above-mentioned voltage level shift circuit (source follower circuit).
When the voltage level shift circuit illustrated in FIG. 7 is used at the input of a differential amplifier circuit, at least two voltage level shift circuits having the same characteristics are necessary. However, when a plurality of voltage level shift circuits having the same characteristics are formed, there is a problem in that, due to uneven accuracy in manufacture, it is difficult to maintain the same difference between the input potential and the output potential of the respective voltage level shift circuits.
Further, in a voltage level shift circuit illustrated in FIG. 7, due to fluctuations in the power supply voltage, source-drain voltage of a transistor M32 for supplying constant current fluctuates, and thus, there is a problem in that the power supply rejection ratio is deteriorated due to channel length modulation effect.
Further, the voltage level shift circuit illustrated in FIG. 7 has a problem in that, because fluctuations on the side of the power supply voltage are caused at an output terminal through a parasitic capacitance between a substrate and a drain terminal of the P-channel enhancement type transistor M32 used as the load, the power supply rejection ratio at a low frequency (<1 kHz) is deteriorated.